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The PSPL5580 is a broadband coaxial bias insertion tee and DC blocking capacitor designed to pass fast rise pulses without waveform distortion. The rise time is 28 ps with a –3 dB bandwidth extending from 10 KHz to 15 GHz. The PSPL5580 is designed to handle DC currents up to 2 A. The PSPL5580 is supplied with an external choke mounted to a terminal strip and an additional inductive circuit on an external PCBA.
Key performance specifications
- 10 kHz to 15 GHz
- 28 ps rise time
- 50 V, 2 A
Typical performance
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1 dB/div and 2 GHz/div Insertion Loss
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5 dB/div and 2 GHz/div Return Loss
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10 dB/div and 2 GHz/div Isolation (AC-DC)
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Top to bottom: 500 ps/div, 100 ps/div, and 20 ps/div 10 ps Step Response
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5% rho/div and 200 ps/div 35 ps TDR of AC port
Specifications
Parameter | Symbol | Units | Minimum | Typical | Maximum | Comments |
---|---|---|---|---|---|---|
Impedance | Z | ohms | 50 | |||
Upper 3 dB frequency | fc,h | GHz | 10 | 15 | ||
Lower 3 dB frequency | fc,l | kHz | 10 | |||
Rise time | tr | ps | 28 | 35 | 10 - 90% | |
Insertion loss | S21 | dB | 1 | 0.1 - 3 GHz, ±0.5 dB | ||
Input (AC) Return Loss | S11 | dB | RL > 15 dB - 1 dB / GHz * f (GHz) | 0.1 < f < 10 GHz | ||
Refl. Coefficient (35 ps TDR) | Γ | % | +8 -13 | t ≤ 100 ps t > 100 ps |
||
DC voltage | V | V | 50 | |||
DC current | I | A | 2 | |||
Capacitance | C | µF | 0.22 | - 50%, + 80% | ||
Inductance | L | mH | 1.1 | ±25% | ||
Resistance | R | ohms | 0.8 | |||
RF power | P | W | 2.5 | Average power | ||
Isolation | S13 | dB | 30 | |||
DC path bandwidth | fc,DC | kHz | 9 | |||
RF Connectors | SMA jacks (f) | |||||
DC Connector | Wires to PC Board and DC 1 | |||||
Warranty | One year |
- Mechanical dimensions
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Dimensions in inches, Tolerance = 0.01
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1 The PSPL5580 consists of a coaxial unit, external coil and a separate pc board. These are hi-z circuits. To prevent undesired HF resonances, do not use coax or long wires. If the pc board is not used, the low frequency cut-off is 500 kHz.
Ordering information
Models
- PSPL5580
- BIAS TEE, 15 GHz, 50 V, 2 A